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Parallel Computer Routing and Communication
This workshop was a continuation of the PCRCW ’94 workshop that focused on issues in parallel communication and routing in support of parallel processing. The workshop series provides a forum for researchers and designers to exchange ideas with respect to challenges and issues in supporting communication for high-performance parallel computing. Within the last few years we have seen the scope of interconnection network technology expand beyond traditional multiprocessor systems to include high-availability clusters and the emerging class of system area networks. New application domains are creating new requirements for interconnection network services, e.g., real-time video, on-line data m...
High Performance Computing - HiPC 2000
This book constitutes the refereed proceedings of the 7th International Conference on High Performance Computing, HiPC 2000, held in Bangalore, India in December 2000. The 46 revised papers presented together with five invited contributions were carefully reviewed and selected from a total of 127 submissions. The papers are organized in topical sections on system software, algorithms, high-performance middleware, applications, cluster computing, architecture, applied parallel processing, networks, wireless and mobile communication systems, and large scale data mining.
On-Chip Networks, Second Edition
This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps ...
Deadlock Resolution in Computer-Integrated Systems
Complex computer-integrated systems offer enormous benefits across a wide array of applications, including automated production, transportation, concurrent software, and computer operating systems, computer networks, distributed database systems, and many other automated systems. Yet, as these systems become more complex, automated, distributed, and computing-intensive, the opportunity for deadlock issues rises exponentially. Deadlock modeling, detection, avoidance, and recovery are critical to improving system performance. Deadlock Resolution in Computer-Integrated Systems is the first text to summarize and comprehensively treat this issue in a systematic manner. Consisting of contributions...
On-Chip Networks
With the ability to integrate a large number of cores on a single chip, research into on-chip networks to facilitate communication becomes increasingly important. On-chip networks seek to provide a scalable and high-bandwidth communication substrate for multi-core and many-core architectures. High bandwidth and low latency within the on-chip network must be achieved while fitting within tight area and power budgets. In this lecture, we examine various fundamental aspects of on-chip network design and provide the reader with an overview of the current state-of-the-art research in this field. Table of Contents: Introduction / Interface with System Architecture / Topology / Routing / Flow Control / Router Microarchitecture / Conclusions
